A hybrid flash translation layer design for SLC-MLC flash memory based multibank solid state disk

Microprocessors and Microsystems

Volumn 35, Issue 1, 2011, Pages 48-59

  Park, Jung Wook ^a   Park, Seung Ho ^a   Weems, Charles C ^b   Kim, Shin Dug ^a  

^a Yonsei University   (South Korea)

^b Biologically Inspired Neural and Dynamical Systems Laboratory   (United States)

Author keywords

Flash translation layer; Hybrid flash; Multi bank memory; Solid state disk

Indexed keywords

ACCESS PATTERNS; FLASH TRANSLATION LAYER; HYBRID FLASH; HYBRID MODEL; INTERLEAVING TECHNIQUE; LOW COSTS; MULTI BANK MEMORY; MULTILEVEL CELL; NAND FLASH; NAND FLASH MEMORY; TRANSFER RATES;

DISKS (STRUCTURAL COMPONENTS); NAND CIRCUITS;

FLASH MEMORY;

EID: 79551499873     PISSN: 01419331     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.micpro.2010.08.001     Document Type: Article

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