Chesmin: A heuristic for state reduction in incompletely specified finite state machines

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2002, Pages 248-254

  Gören, Sezer ^a   Ferguson, F Joel ^a  

^a University of California Santa Cruz   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHECKING SEQUENCE; EXACT METHODS; STATE MINIMIZATION; STATE REDUCTION; TEST VECTORS;

HEURISTIC ALGORITHMS;

EXHIBITIONS;

EID: 78651571500     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2002.998280     Document Type: Conference Paper

References (13)

1. D.A. Huffmann, "The Synthesis of Sequential Switching Circuits," Journal of the Franklin Institute, vol. 257, no. 3, pp. 161-190, 1954.
2. J.E. Hopcroft, "NlogN Algorithm for Minimizing States in Finite Automata," Tech. Rep. CS 71/190, Stanford University, 1971.
3. C.F. Pfleeger, "State Reduction in Incompletely Specified Finite State Machines," IEEE Trans. on Computers, vol. C-22, pp. 1099-1102, 1973.
4. M.C. Paull and S.H. Unger, "Minimizing the Number of States in Incompletely Specified Sequential Switching Functions," IRE Trans. on Electronic Computers, vol. EC-8, pp. 356-367, 1959.
5. F. Luccio, "Extending the Definition of Prime Compatibility Classes of States in Incompletely Specified Flow Tables with the Help of Prime Closed Sets," IEEE Trans. on Electronic Computers, pp. 953-956, 1969.
6. J.-K. Rho, G. Hachtel, F. Somenzi, and R. Jacoby, "Exact and Heuristic Algorithms for the Minimization of Incompletely Specified Finite State Machines," IEEE Trans. on Computer-Aided Design, vol.13, no.2, pp. 167-177, 1994.
7. H. Higuchi, Y. Matsunaga, "A Fast State Reduction Algorithm for Incompletely Specified Finite State Machines," Design Automation Conference, pp. 463-466, 1996.
8. T. Kam, T. Villa, R. Brayton, and A. Sangiovanni-Vincentelli, "Synthesis of FSMs: Functional Optimization," Kluwer Academic Publishers, 1997.
9. J.M. Pena, A.L. Oliveira, "A New Algorithm for Exact Reduction of Incompletely Specified Finite State Machines," International Conference on Computer Aided Design, pp. 482-489, 1998.
10. A.W. Biermann and J.A. Feldman, "On the Synthesis of Finite State Machines from Samples of Their Behavior," IEEE Trans. on Computers, vol. 21, pp. 592-597, 1972.F
11. D. Angluin, "Learning Regular Sets from Queries and Counter Examples," Inform. Comput., vol. 75, no. 2, pp. 87-106, 1987.
12. S. Gören, F.J. Ferguson, "Checking Sequence Generation for Asynchronous Sequential Elements," Int. Test Conference, pp. 406-413, 1999.
13. F.C. Hennie, "Fault Detecting Experiments for Sequential Circuits," Int. Symp. on Swit. Circuit Theory and Logic Design, pp. 95-110, 1964.