Dedicated hardware for hybrid evolutionary computation

Lecture Notes in Electrical Engineering

Volumn 33 LNEE, Issue , 2009, Pages 151-161

  Yoshikawa, Masaya ^a   Yamauchi, Hironori ^b   Terai, Hidekazu ^b  

^a MEIJO UNIVERSITY   (Japan)

^b RITSUMEIKAN UNIVERSITY   (Japan)

Author keywords

Dedicated hardware; Genetic algorithm; High speed processing; Hybrid optimization; Simulated annealing

Indexed keywords

COMBINATORIAL OPTIMIZATION PROBLEMS; CONTROL PROCESSING; DEDICATED HARDWARE; EVOLUTIONARY COMPUTATIONS; GENERAL PURPOSE; GENETIC OPERATIONS; HARDWARE ARCHITECTURE; HIGH SPEED PROCESSING; HYBRID OPTIMIZATION; PROPOSED ARCHITECTURES; SIMULATION RESULT; SOFTWARE PROCESSING;

ANNEALING; COMBINATORIAL OPTIMIZATION; GENETIC ALGORITHMS; HARDWARE; HIGH SPEED CAMERAS; SPEED;

SIMULATED ANNEALING;

EID: 78651532005     PISSN: 18761100     EISSN: 18761119     Source Type: Book Series    
DOI: 10.1007/978-1-4020-9532-0_12     Document Type: Conference Paper

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