User Customizable Logic Paper (UCLP) with Sea-of Transmission-Gates (SOTG) of 2-V organic CMOS and ink-jet printed interconnects

IEEE Journal of Solid-State Circuits

Volumn 46, Issue 1, 2011, Pages 285-292

  Ishida, Koichi ^a   Masunaga, Naoki ^a,b   Takahashi, Ryo ^a   Sekitani, Tsuyoshi ^c   Shino, Shigeki ^d   Zschieschang, Ute ^e   Klauk, Hagen ^e   Takamiya, Makoto ^c   Someya, Takao ^c   Sakurai, Takayasu ^a  

^a INSTITUTE OF INDUSTRIAL SCIENCE   (Japan)

^b TERUMO CORPORATION   (Japan)

^c UNIVERSITY OF TOKYO   (Japan)

^d University of Tokyo   (Japan)

^e MAX PLANCK INSTITUT FÜR FESTKÖRPERFORSCHUNG   (Germany)

Author keywords

2 V organic CMOS; Customizability; education; gate array; ink jet printer; large area electronics; printed interconnects; prototyping; room temperature sintering; transmission gate logic

Indexed keywords

2-V ORGANIC CMOS; CUSTOMIZABILITY; GATE ARRAYS; INK-JET PRINTER; LARGE-AREA ELECTRONICS; PRINTED INTERCONNECTS; PROTOTYPING; ROOM TEMPERATURE; TRANSMISSION GATE LOGIC;

INK; INK JET PRINTERS; PRINTING PRESSES; SINTERING;

INK JET PRINTING;

EDUCATION; INK JET PRINTING; PRINTING MACHINES; PROTOTYPES; SINTERING;

EID: 78650902687     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2010.2074330     Document Type: Conference Paper

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