Rethinking digital design: Why design must change

IEEE Micro

Volumn 30, Issue 6, 2010, Pages 9-24

  Shacham, Ofer ^a   Azizi, Omid ^a,c   Wachs, Megan ^a   Qadeer, Wajahat ^a   Asgar, Zain ^a   Kelley, Kyle ^a   Stevenson, John P ^a   Richardson, Stephen ^a   Horowitz, Mark ^a   Lee, Benjamin ^b   Solomatnikov, Alex ^c   Firoozshahian, Amin ^c  

^a STANFORD UNIVERSITY   (United States)

^b DUKE UNIVERSITY   (United States)

^c Hicamp Systems   (United States)

Author keywords

ASIC; chip generator; chip multiprocessor; CMOS; Dennard scaling; design methodology; H.264; hardware generation; hardware optimization; Moore's Law; power efficiency; RTL verification; system on chip

Indexed keywords

ASIC; CHIP GENERATOR; CHIP MULTIPROCESSOR; CMOS; DENNARD SCALING; DESIGN METHODOLOGY; H.264; HARDWARE OPTIMIZATION; MOORE'S LAW; POWER EFFICIENCY; RTL VERIFICATION; SYSTEM ON CHIPS;

ELECTRIC POWER SUPPLIES TO APPARATUS; MICROPROCESSOR CHIPS; MULTIPROCESSING SYSTEMS; OPTIMIZATION; STATIC RANDOM ACCESS STORAGE;

DESIGN;

EID: 78650866374     PISSN: 02721732     EISSN: None     Source Type: Journal    
DOI: 10.1109/MM.2010.81     Document Type: Article

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