FPGA and ASIC implementation of robust invisible binary image watermarking algorithm using connectivity preserving criteria

Microelectronics Journal

Volumn 42, Issue 1, 2011, Pages 82-88

  Karthigaikumar, P ^a   Baskaran, K ^b  

^a KARUNYA UNIVERSITY   (India)

^b GOVERNMENT COLLEGE OF TECHNOLOGY   (India)

Author keywords

ASIC; FPGA; Low power VLSI; Multimedia; Watermarking

Indexed keywords

ASIC; DIGITAL DATAS; DIGITAL SIGNALS; FPGA; IMAGE WATERMARKING ALGORITHM; LOW POWER; MULTIMEDIA; SPATIAL DOMAINS; WATERMARKING ALGORITHMS; XILINX FPGA;

ALGORITHMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; BINARY IMAGES; DIGITAL WATERMARKING; ELECTRIC POWER SUPPLIES TO APPARATUS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

WATERMARKING;

EID: 78650686444     PISSN: 00262692     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.mejo.2010.08.023     Document Type: Article

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