Compilation techniques for CGRAs: Exploring all parallelization approaches

Embedded Systems Week 2010 - Proceedings of the 8th IEEE/ACM/IFIP International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CODES+ISSS'2010

Volumn , Issue , 2010, Pages 185-186

  Vander Aa, Tom ^a   Raghavan, Praveen ^a   Mahlke, Scott ^b   De Sutter, Bjorn ^c   Shrivastava, Aviral ^d   Hannig, Frank ^e  

^a IMEC   (Belgium)

^b UNIVERSITY OF MICHIGAN   (United States)

^c GHENT UNIVERSITY   (Belgium)

^d ARIZONA STATE UNIVERSITY   (United States)

^e UNIVERSITY OF ERLANGEN NUREMBERG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ACCEPTANCE RATE; BEST-PRACTICES; CO-DESIGNS; COMPILATION TECHNIQUES; EMERGING TOPICS; FACE TO FACE; HARDWARE/SOFTWARE; HIGH PERFORMANCE COMPUTING; HIGH QUALITY; NEW DIRECTIONS; ON CURRENTS; OVERALL QUALITY; PARALLELIZATIONS; POSTER SESSIONS; PROGRAM COMMITTEE; RESEARCH AND DEVELOPMENT; REVIEW PROCESS; SYSTEM LEVEL DESIGN; SYSTEM SYNTHESIS; SYSTEMC; SYSTEMS RESEARCH; TECHNICAL PROGRAMS; THEORY AND PRACTICE; ARIZONA STATE UNIVERSITY; COARSE-GRAINED; INNER LOOPS; INSTRUCTION-LEVEL PARALLELISM; PERFORMANCE; PROGRAMMER PRODUCTIVITY; RECONFIGURABLE ARRAY; RETARGETABLE; UNIVERSITY OF MICHIGAN;

EMBEDDED SOFTWARE; INDUSTRIAL RESEARCH; LOGIC DESIGN; PAPER; RESEARCH AND DEVELOPMENT MANAGEMENT; TECHNICAL PRESENTATIONS; STRUCTURED PROGRAMMING;

EMBEDDED SYSTEMS; RECONFIGURABLE HARDWARE;

EID: 78650668910     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1878961.1878995     Document Type: Conference Paper

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