A smart 16-channel front-end system for extracelluar neural recording

PrimeAsia 2010 - 2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics

Volumn , Issue , 2010, Pages 408-411

  Gui, Yun ^a   Zhang, Xu ^a   Pei, Weihua ^a   Huang, Beiju ^a   Chen, Hongda ^a  

^a INSTITUTE OF SEMICONDUCTORS   (China)

Author keywords

[No Author keywords available]

Indexed keywords

BAND GAIN; CMOS PROCESSS; END SYSTEMS; IN-VITRO; MICROELECTRODE ARRAY; NEURAL RECORDINGS; NEURAL SIGNALS; RECORDING CHANNELS; SILICON-BASED;

CMOS INTEGRATED CIRCUITS; MICROELECTRODES; MICROELECTRONICS; MICROPROCESSOR CHIPS;

HIGH FREQUENCY AMPLIFIERS;

EID: 78650161555     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/PRIMEASIA.2010.5604877     Document Type: Conference Paper

References (10)

1. MS Chae, W Liu, Z Yang, T Chen, J Kim, M Sivaprakasam, and M Yuce, "A 128-channel 6mW wireless neural recording IC with on-thefly spike sorting and UWB transmitter," IEEE International Solid-State Circuits Conference Digest of Technical Papers, pp. 146-603, February 2008.
2. J. N. Y. Aziz, K. Abdelhalim, R. Shulyzki, R. Genov, B. L. Bardakjian, M. Derchansky, D. Serletis, and P. L. Carlen, "256-Channel Neural Recording and Delta Compression Microsystem With 3D Electrodes," IEEE Journal of Solid-State Circuits, vol. 44, no. 3, pp. 995-1005, March 2009
3. K. Najafi and K. D. Wise, "An implantable multielectrode array with on-chip signal processing," IEEE Journal of Solid-State Circuits, vol. SC-21, pp. 1035-1044, Dec. 1986.
4. A. C. Metting van Rijn, A. Peper, and C. A. Grimbergen, "High-quality recording of bioelectric events," Med. Biol. Eng. Comput., vol. 29, pp. 1035-1044, 1986.
5. T. Jochum, T. Denison, and P. Wolf, "Integrated circuit amplifiers for multi-electrode intracortical recording," Journal of Neural Engineering, vol. 6, pp. 1-26, 2009.
6. R. R. Harrison and C. Charles, "A low-power low-noise CMOS amplifier for neural recording applications," IEEE Journal of Solid-State Circuits, vol. 38, pp. 958-965, June 2003.
7. R. R. Harrison, P. T. Watkins, R. J. Kier, R. O. Lovejoy, D. J. Black, B. Greger, and F. Solzbacher, "A low-power integrated circuit for a wireless 100-electrode neural recording system," IEEE Journal of Solid State Circuits, vol. 42, no. 1, pp. 123-133, Jan. 2007.
8. C. Dumortier, B. Gosselin, and M. Sawan, "Wavelet Transforms Dedicated to Compress Recorded ENGs from Multichannel Implants: Comparative Architectural Study," IEEE International Symposium on Circuits and Systems, pp. 2129-2132, 2006.
9. T. Horiuchi, T. Swindell, D. Sander, and P. Abshire, "A low-power CMOS neural amplifier with amplitude measurements for spike sorting," in Proc. IEEE International Symposium on Circuits and Systems, vol. 4, pp. IV - 29-32, 2004.
10. S. O'Driscoll, T. H. Meng, K. V. Shenoy, and C. Kemere, "Neurons to silicon: implantable prosthesis processor," IEEE International Solid-State Circuits Conference Digest of Technical Papers, pp. 552-553, 2006.