A multi-performance processor for reducing the energy consumption of real-time embedded systems

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

Volumn E93-A, Issue 12, 2010, Pages 2533-2541

  Ishihara, Tohru ^a  

^a KYUSHU UNIVERSITY   (Japan)

Author keywords

Embedded systems; Low power design; Microprocessor; Realtime systems

Indexed keywords

ASSOCIATIVE PROCESSING; BUFFER STORAGE; CACHE MEMORY; CLOCKS; COMPUTER ARCHITECTURE; ELECTRIC POWER SUPPLIES TO APPARATUS; EMBEDDED SOFTWARE; ENERGY EFFICIENCY; ENERGY UTILIZATION; INTEGRATED CIRCUIT DESIGN; INTERACTIVE COMPUTER SYSTEMS; MICROPROCESSOR CHIPS; REAL TIME SYSTEMS; SYSTEMS ANALYSIS; VOLTAGE SCALING;

DYNAMIC VOLTAGE CONTROL; DYNAMIC VOLTAGE SCALING (DVS); GATE LEVEL SIMULATION; INSTRUCTION SET ARCHITECTURE; LOW-POWER DESIGN; PROCESSING ELEMENTS; REAL-TIME EMBEDDED SYSTEMS; SET ASSOCIATIVE CACHE;

EMBEDDED SYSTEMS;

EID: 78650018652     PISSN: 09168508     EISSN: 17451337     Source Type: Journal    
DOI: 10.1587/transfun.E93.A.2533     Document Type: Article

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