Si nanowire device and its modeling

International Conference on Simulation of Semiconductor Processes and Devices, SISPAD

Volumn , Issue , 2010, Pages 63-66

  Iwai, Hiroshi ^a   Natori, Kenji ^a   Kakushima, Kuniyuki ^a   Ahmet, Parhat ^a   Oshiyama, Atsushi ^b   Shiraishi, Kenji ^c   Iwata, Jun Ichi ^c   Yamada, Keisaku ^d   Ohmori, Kenji ^d  

^a TOKYO INSTITUTE OF TECHNOLOGY   (Japan)

^b UNIVERSITY OF TOKYO   (Japan)

^c UNIVERSITY OF TSUKUBA   (Japan)

^d WASEDA UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CIRCUIT DESIGNERS; CMOS DEVICES; COMPACT MODEL; CROSS-SECTIONAL SHAPE; EXPERIMENTAL DATA; INTERFACE STATE; MECHANICAL STRESS; MOSFETS; OFF-LEAKAGE CURRENT; ON-CURRENTS; SI NANOWIRE; ULTRA-SMALL;

BAND STRUCTURE; CRYSTAL ORIENTATION; FIELD EFFECT TRANSISTORS; MESFET DEVICES; NANOWIRES; SEMICONDUCTOR DEVICES; SILICON; STRESSES;

SEMICONDUCTING SILICON COMPOUNDS;

EID: 78649604811     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SISPAD.2010.5604569     Document Type: Conference Paper

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