High-performance heterogeneous computing with the convey HC-1

Computing in Science and Engineering

Volumn 12, Issue 6, 2010, Pages 80-87

  Bakos, Jason D ^a  

^a UNIVERSITY OF SOUTH CAROLINA   (United States)

Author keywords

field programmable gate arrays; heterogeneous computing; high performance computing; hybrid computing; Reconfigurable computing

Indexed keywords

CROSSBAR SWITCH; HETEROGENEOUS COMPUTING; HIGH-CAPACITY; HIGH-PERFORMANCE COMPUTING; HYBRID COMPUTING; MEMORY MODULES; MEMORY SYSTEMS; RECONFIGURABLE COMPUTING; RECONFIGURABLE COPROCESSORS;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

LOGIC GATES;

EID: 78349279628     PISSN: 15219615     EISSN: None     Source Type: Journal    
DOI: 10.1109/MCSE.2010.135     Document Type: Article

References (2)

1. J. leidel, "Design Philosophies for Memory-Centric Instruction Set Architectures," presentation, Symp. Application Accelerators in high Performance Computing (SAAhPC'10), 2010; http://saahpc.ncsa.illinois.edu/ presentations/day1/session4/presentation-leidel.pdf.
2. Convey Computer, "Convey Computer Announces record-Breaking Smith-Waterman Acceleration of 172x," press release, 24 May 2010; www.conveycomputer.com/resources/Convey-Announces-record-Breaking-Smith- Waterman-Acceleration.pdf.