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Volumn , Issue , 2002, Pages 89-98

Finite element analysis on soft-pad grinding of wire-sawn silicon wafers

Author keywords

Element method; Grinding; Lapping; Machining; Material removal; Semiconductor material; Silicon wafers; Slicing

Indexed keywords

CHIP SCALE PACKAGES; FINITE ELEMENT METHOD; GRINDING (COMMINUTION); GRINDING (MACHINING); LAPPING; MECHANICAL ENGINEERING; MICROPROCESSOR CHIPS; SEMICONDUCTING SILICON; SEMICONDUCTING SILICON COMPOUNDS; WIRE;

EID: 78249243872     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1115/IMECE2002-39277     Document Type: Conference Paper
Times cited : (2)

References (24)
  • 2
    • 0008118888 scopus 로고    scopus 로고
    • New Abrasive Trends in Manufacturing of Silicon Wafers
    • American Society For Precision Engineering, April, St. Louis, Missouri
    • Tricard, M., Kassir, S., Herron, P., and Pei, Z.J., 1998, "New Abrasive Trends in Manufacturing of Silicon Wafers," Silicon Machining Symposium, American Society For Precision Engineering, April, St. Louis, Missouri.
    • (1998) Silicon Machining Symposium
    • Tricard, M.1    Kassir, S.2    Herron, P.3    Pei, Z.J.4
  • 3
    • 0033901365 scopus 로고    scopus 로고
    • Plane silicon wafer technology
    • April 2000
    • Mozer, A., 2000, "Plane silicon wafer technology," European Semiconductor, April 2000, pp. 29-30.
    • (2000) European Semiconductor , pp. 29-30
    • Mozer, A.1
  • 5
    • 0029403766 scopus 로고
    • Fracture strength of large diameter silicon wafers
    • November
    • Bawa, M.S., Petro, E.F., and Grimes, H.M., 1995, "Fracture strength of large diameter silicon wafers," Semiconductor International, November, pp. 115-118.
    • (1995) Semiconductor International , pp. 115-118
    • Bawa, M.S.1    Petro, E.F.2    Grimes, H.M.3
  • 6
    • 0004278851 scopus 로고    scopus 로고
    • Method of manufacturing semiconductor mirror wafers
    • European Patent Application, EP0782179A2, Bulletin 1997/27
    • Fukami, T., Masumura, H., Suzuki, K., and Kudo, H., 1997, "Method of manufacturing semiconductor mirror wafers," European Patent Application, EP0782179A2, Bulletin 1997/27.
    • (1997)
    • Fukami, T.1    Masumura, H.2    Suzuki, K.3    Kudo, H.4
  • 7
    • 0010541578 scopus 로고    scopus 로고
    • Wafer processing method and equipment therefore
    • US Patent 5,882,539, March 16, 1999
    • Hasegawa, F., Kuruda, Y., and Yamada, M., 1999, "Wafer processing method and equipment therefore," US Patent 5,882,539, March 16, 1999.
    • (1999)
    • Hasegawa, F.1    Kuruda, Y.2    Yamada, M.3
  • 8
    • 33646647667 scopus 로고    scopus 로고
    • Method of manufacturing a monocrystalline semiconductor wafer with mirror-finished surface including a gas phase etching and a heating step, and wafers manufactured by said method
    • European Patent Application, EP0798766A1, Bulletin 1997/40
    • Oishi, H., 1997, Method of manufacturing a monocrystalline semiconductor wafer with mirror-finished surface including a gas phase etching and a heating step, and wafers manufactured by said method, European Patent Application, EP0798766A1, Bulletin 1997/40.
    • (1997)
    • Oishi, H.1
  • 11
    • 0024133633 scopus 로고
    • Comparative study of advanced slicing techniques for silicon
    • edited by S. Chandrasekar, R. Komanduri, W. Daniels and W. Rapp, The American Society of Mechanical Engineers, New York, NY
    • Werner, P.G., and Kenter, I.M., 1988, "Comparative study of advanced slicing techniques for silicon," Intersociety symposium on machining of advanced ceramic materials and components, edited by S. Chandrasekar, R. Komanduri, W. Daniels and W. Rapp, The American Society of Mechanical Engineers, New York, NY.
    • (1988) Intersociety Symposium on Machining of Advanced Ceramic Materials and Components
    • Werner, P.G.1    Kenter, I.M.2
  • 12
    • 0022009190 scopus 로고
    • I.D. sawing - Diameters increase
    • Buttner, A., 1985, "I.D. sawing - diameters increase," Industrial Diamond Review, No. 2, pp. 77-79.
    • (1985) Industrial Diamond Review , Issue.2 , pp. 77-79
    • Buttner, A.1
  • 13
    • 0010539792 scopus 로고    scopus 로고
    • Method of manufacturing semiconductor wafers
    • European patent application, EP0798405A2
    • Kato, T., Masumura, H., Okuni, S., and Kudo, H., 1997, "Method of manufacturing semiconductor wafers," European patent application, EP0798405A2.
    • (1997)
    • Kato, T.1    Masumura, H.2    Okuni, S.3    Kudo, H.4
  • 15
    • 0025439729 scopus 로고
    • Characterization of mirror-like wafer surfaces using the magic mirror method
    • DOI 10.1016/0022-0248(90)90221-6
    • Hahn, S., Kugimiya, K., Yamashita, M., Blaustein, P.R., and Takahashi, K., 1990, "Characterization of mirror-like wafer surfaces using the magic mirror method," Journal of Crystal Growth, Vol. 103, No. 1-4, pp. 423-432. (Pubitemid 20737207)
    • (1990) Journal of Crystal Growth , vol.103 , Issue.1-4 , pp. 423-432
    • Hahn, S.1    Kugimiya, K.2    Yamashita, M.3    Blaustein, P.R.4    Takahashi, K.5
  • 17
    • 0026630809 scopus 로고
    • Characterization of deformations and texture defects on polished wafers of III-V compound crystals by the magic mirror method
    • Shiue, C.C., Lie, K.H., and Blaustein, P.R., 1992, "Characterization of deformations and texture defects on polished wafers of III-V compound crystals by the magic mirror method," Semiconductor Science and Technology, Vol. 7, No. 1A, pp. 95-97.
    • (1992) Semiconductor Science and Technology , vol.7 , Issue.1 A , pp. 95-97
    • Shiue, C.C.1    Lie, K.H.2    Blaustein, P.R.3
  • 19
    • 0003761608 scopus 로고    scopus 로고
    • Method of processing semiconductor wafers
    • Y. US Patent 6,114,245, September 5
    • Vandamme, R., Y. Xin, Y., and Z.J. Pei, 2000, "Method of processing semiconductor wafers," US Patent 6,114,245, September 5.
    • (2000)
    • Vandamme, R.1    Xin, Y.2    Pei, Z.J.3
  • 20
    • 0037063907 scopus 로고    scopus 로고
    • Finite element analysis for grinding and lapping of wire-sawn silicon wafers
    • submitted to
    • Liu, W., Pei, Z.J., and Xin, X.J., 2002, "Finite element analysis for grinding and lapping of wire-sawn silicon wafers," submitted to Journal of Materials Processing Technology.
    • (2002) Journal of Materials Processing Technology
    • Liu, W.1    Pei, Z.J.2    Xin, X.J.3
  • 21
    • 0142148462 scopus 로고    scopus 로고
    • Semiconductor wafer surface grinding method - Involves reducing suction pressure of semiconductor wafer to base plate during generation of spark during grinding process
    • Japanese patent, JP9248758A, September 22
    • Shinetsu, H.K., 1997, "Semiconductor wafer surface grinding method - involves reducing suction pressure of semiconductor wafer to base plate during generation of spark during grinding process," Japanese patent, JP9248758A, September 22.
    • (1997)
    • Shinetsu, H.K.1
  • 22
    • 0011696335 scopus 로고    scopus 로고
    • Grinding process and apparatus for planarizing sawed wafers
    • US Patent 5,964,646, Oct. 12, 1999
    • Kassir, S.M., and Walsh, T.A., 1999, "Grinding process and apparatus for planarizing sawed wafers," US Patent 5,964,646, Oct. 12, 1999.
    • (1999)
    • Kassir, S.M.1    Walsh, T.A.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.