Nullcline-based design of a silicon neuron

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 57, Issue 11, 2010, Pages 2938-2947

  Basu, Arindam ^a   Hasler, Paul E ^b  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

^b GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

Ion channel dynamics; nullcline; saddle node bifurcation; silicon neuron; type I membrane

Indexed keywords

BIFURCATION (MATHEMATICS); SILICON;

ION CHANNEL; NETWORK BEHAVIORS; NULLCLINE; PARAMETER SPACES; SADDLE HOMOCLINIC BIFURCATION; SADDLE NODE BIFURCATION; SILICON NEURON; STRATEGIC APPROACHES;

NEURONS;

EID: 78149468320     PISSN: 15498328     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2010.2048772     Document Type: Article

References (22)

1. G. Indiveri, E. Chicca, and R. Douglas, "A VLSI array of low-power spiking neurons and bistable synapses with spike-timing dependent plasticity", IEEE Trans. Neural Netw., vol. 17, no. 1, pp. 211-221, Jan. 2006.
2. R. Vogelstein, U. Mallik, J. Vogelstein, and G. Cauwenberghs, "Dynamically reconfigurable silicon array of spiking neurons with conductance-based synapses", IEEE Trans. Neural Netw., vol. 18, no. 1, pp. 253-265, Jan. 2007.
3. J. Arthur and K. Boahen, "Synchrony in silicon: The gamma rhythm", IEEE Trans. NeuralNetw., vol. 18, no. 6, pp. 1815-1825, Nov. 2007.
4. A. L. Hodgkin, "The local electric changes associated with repetitive action in a non-medullated axon", J. Physiol, vol. 107, no. 2, pp. 165-181, Mar. 1948.
5. J. Rinzel and G. B. Ermentrout, Analysis of Neural Excitability and Oscillations, Methods in Neural Engineering, C. Koch and I. Segev, Eds. Cambridge, MA: MIT Press, 1989.
6. E. M. Izhikevich, Dynamical Systems in Neuroscience: The Geometry of Excitability and Bursting. Cambridge, MA: MIT Press, 2007.
7. A. Roy, P. Steinmetz, S. Hsiao, K. Johnson, and E. Niebur, "Synchrony: A neural correlate of somatosensory attention", J. Neurophysiol., vol. 98, pp. 1645-1661, Jun. 2007.
8. S. Saighi, J. Tomas, Y. Bornat, and S. Renaud, "A conductance-based silicon neuron with dynamically tunable model parameters", in Proc. Int. IEEEEMBS Conf. Neural Eng., 2005, pp. 285-288.
9. M. F. Simoni, G. S. Cymbalyuk, M. E. Sorensen, R. L. Calabrese, and S. P. DeWeerth, "A multiconductance silicon neuron with biologically matched dynamics", IEEE Trans. Biomed. Eng., vol. 51, no. 2, pp. 342-354, Feb. 2004.
10. T. Yu and G. Cauwenberghs, "Analog VLSI neuromorphic network with programmable membrane channel kinetics", in Proc. Int. Symp. Circuits Syst., May 2009, pp. 349-352.
11. A. Basu, C. Petre, and P. Hasler, "Bifurcations in a silicon neuron", in Proc. Int. Symp. Circuits Syst., May 2008, pp. 428-431.
12. E. Farquhar and P. Hasler, "A bio-physically inspired silicon neuron", IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 52, no. 3, pp. 477-488, Mar. 2005.
13. T. Takemoto, T. Kohno, and K. Aihara, "MOSFET implementation of class I* neurons coupled by gap junctions", Artif Life Robot., vol. 10, no. 1, pp. 1-5, Jul. 2006.
14. H. Lecar, "Morris-Lecar model", Scholarpedia, vol. 2, no. 10, p. 1333, 2007.
15. A. Basu, R. Robucci, and P. Hasler, "A low-power, compact, adaptive logarithmic transimpedance amplifier operating over seven decades of current", IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 49, no. 1, pp. 2167-2177, Oct. 2007.
16. A. Basu, C. Twigg, S. Brink, P. Hasler, C. Petre, S. Ramakrishnan, S. Koziol, and C. Schlottmann, "RASP 2.8: A new generation of floatinggate based field programmable analog array", in Proc. IEEE Custom Integr. Circuits Conf., Sep. 2008, pp. 213-216.
17. P. Livi and G. Indiveri, "A current-mode conductance-based silicon neuron for address-event neuromorphic systems", in Proc. Int. Symp. Circuits Syst., May 2009, pp. 2898-2901.
18. F. Folowosele, A. Harrison, A. Cassidy, A. G. Andreou, R. Etienne-Cummings, S. Mihalas, E. Niebur, and T. J. Hamilton, "A switched capacitor implementation of the generalized linear integrate-and-fire neuron", in Proc. Int. Symp. Circuits Syst., May 2009, pp. 2149-2152.
19. K. Hynna and K. Boahen, "Neuronal ion-channel dynamics in silicon", in Proc. Int. Symp. Circuits Syst., May 2006, pp. 3614-3617.
20. A. Bandyopadhyay, G. Serrano, and P. Hasler, "Adaptive algorithm using hot-electron injection for programming analog computational memory elements within 0.2% of accuracy over 3.5 decades", IEEE J. Solid-State Circuits, vol. 41, no. 9, pp. 2107-2114, Sep. 2006.
21. R. Sarpeshkar, "Efficient Precise Computation With Noisy Components: Extrapolating From an Electronic Cochlea to the Brain", Ph. D. dissertation, California Inst. Technol., Pasadena, CA, 1997.
22. E. M. Izhikevich, "Which model to use for cortical spiking neurons?", IEEE Trans. Neural Netw., vol. 15, no. 5, pp. 1063-1070, Sep. 2004.