VHDL architecture for IEC 61499 function blocks

IET Computers and Digital Techniques

Volumn 4, Issue 6, 2010, Pages 515-524

  O'Sullivan, D ^a   Heffernan, D ^a  

^a UNIVERSITY OF LIMERICK   (Ireland)

Author keywords

[No Author keywords available]

Indexed keywords

FUNCTION BLOCK; HARD REAL-TIME; HARDWARE DESCRIPTION LANGUAGES; HIGH-SPEED INTEGRATED CIRCUITS; IEC 61499; MICRO-PROCESSORS; PARALLEL EXECUTIONS; RUNTIME SYSTEMS; RUNTIMES; SIMPLE MODIFICATIONS; SOFTWARE IMPLEMENTATION; TEST SCENARIO;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA); REAL TIME CONTROL;

COMPUTER HARDWARE DESCRIPTION LANGUAGES;

EID: 78149391860     PISSN: 17518601     EISSN: None     Source Type: Journal    
DOI: 10.1049/iet-cdt.2009.0122     Document Type: Article

References (17)

1. IEC 61499-1:2005-01: 'Function blocks - part 1: architecture'. 2005
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