-
2
-
-
33745797169
-
Reuse-distance-based miss-rate prediction on a per instruction basis
-
ACM, New York
-
Fang, C., Carr, S., Önder, S., Wang, Z.: Reuse-distance-based miss-rate prediction on a per instruction basis. In: Proceedings of the 2004 Workshop on Memory System Performance MSP 2004, Washington, D.C., June 8, pp. 60-68. ACM, New York (2004)
-
(2004)
Proceedings of the 2004 Workshop on Memory System Performance MSP 2004, Washington, D.C., June 8
, pp. 60-68
-
-
Fang, C.1
Carr, S.2
Önder, S.3
Wang, Z.4
-
3
-
-
1442313416
-
Predicting whole-program locality through reuse distance analysis
-
ACM, New York
-
Ding, C., Zhong, Y.: Predicting whole-program locality through reuse distance analysis. In: Proceedings of the ACM SIGPLAN 2003 Conference on Programming Language Design and Implementation, PLDI 2003, San Diego, California, USA, June 9-11, pp. 245-257. ACM, New York (2003)
-
(2003)
Proceedings of the ACM SIGPLAN 2003 Conference on Programming Language Design and Implementation, PLDI 2003, San Diego, California, USA, June 9-11
, pp. 245-257
-
-
Ding, C.1
Zhong, Y.2
-
4
-
-
33747446130
-
Reuse Distance-Based Cache Hint Selection
-
Monien, B., Feldmann, R.L. (eds.) Euro-Par 2002. Springer, Heidelberg
-
Beyls, K., D'Hollander, E.H.: Reuse Distance-Based Cache Hint Selection. In: Monien, B., Feldmann, R.L. (eds.) Euro-Par 2002. LNCS, vol. 2400, pp. 265-274. Springer, Heidelberg (2002)
-
(2002)
LNCS
, vol.2400
, pp. 265-274
-
-
Beyls, K.1
D'Hollander, E.H.2
-
5
-
-
57349089224
-
HMTT: A platform independent full-system memory trace monitoring system
-
ACM, New York
-
Bao, Y., Chen, M., Ruan, Y., Liu, L., Fan, J., Yuan, Q., Song, B., Xu, J.: HMTT: a platform independent full-system memory trace monitoring system. In: Proceedings of the 2008 ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems, SIGMETRICS 2008, Annapolis, MD, USA, June 2-6, pp. 229-240. ACM, New York (2008)
-
(2008)
Proceedings of the 2008 ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems, SIGMETRICS 2008, Annapolis, MD, USA, June 2-6
, pp. 229-240
-
-
Bao, Y.1
Chen, M.2
Ruan, Y.3
Liu, L.4
Fan, J.5
Yuan, Q.6
Song, B.7
Xu, J.8
-
6
-
-
0013267011
-
-
2nd edn. Morgan Kaufmann Publishers, San Francisco ISBN 0-12088-421-6
-
Sweetman, D.: See MIPS Run, 2nd edn. Morgan Kaufmann Publishers, San Francisco (2006) ISBN 0-12088-421-6
-
(2006)
See MIPS Run
-
-
Sweetman, D.1
-
8
-
-
0014701246
-
Evaluation techniques for storage hierarchies
-
Mattson, R.L., Gecsei, J., Slutz, D., Traiger, I.L.: Evaluation techniques for storage hierarchies. IBM System Journal 9(2), 78-117 (1970)
-
(1970)
IBM System Journal
, vol.9
, Issue.2
, pp. 78-117
-
-
Mattson, R.L.1
Gecsei, J.2
Slutz, D.3
Traiger, I.L.4
-
9
-
-
0020564767
-
A study of instruction cache organizations and replacement policies
-
Smith, J.E., Goodman, J.R.: A study of instruction cache organizations and replacement policies. SIGARCH Comput. Archit. News 11(3), pp. 132-137 (1983)
-
(1983)
SIGARCH Comput. Archit. News
, vol.11
, Issue.3
, pp. 132-137
-
-
Smith, J.E.1
Goodman, J.R.2
-
10
-
-
78149267435
-
-
http://www.netlib.org/linpack/
-
-
-
-
11
-
-
78149258669
-
-
http://www.spec.org
-
-
-
-
12
-
-
33244462442
-
Fast data-locality profiling of native execution
-
Berg, E., Hagersten, E.: Fast data-locality profiling of native execution. SIGMETRICS Perform. Eval. Rev. 33(1), 169-180 (2005)
-
(2005)
SIGMETRICS Perform. Eval. Rev.
, vol.33
, Issue.1
, pp. 169-180
-
-
Berg, E.1
Hagersten, E.2
-
14
-
-
33750363816
-
An analytical model for cache replacement policy performance
-
ACM, New York
-
Guo, F., Solihin, Y.: An analytical model for cache replacement policy performance. In: Proceedings of the Joint International Conference on Measurement and Modeling of Computer Systems, SIGMETRICS 2006/Performance 2006, Saint Malo, France, June 26-30, pp. 228-239. ACM, New York (2006)
-
(2006)
Proceedings of the Joint International Conference on Measurement and Modeling of Computer Systems, SIGMETRICS 2006/Performance 2006, Saint Malo, France, June 26-30
, pp. 228-239
-
-
Guo, F.1
Solihin, Y.2
-
15
-
-
21244474546
-
Predicting Inter-Thread Cache Contention on a Chip Multi-Processor Architecture
-
IEEE Computer Society, Washington
-
Chandra, D., Guo, F., Kim, S., Solihin, Y.: Predicting Inter-Thread Cache Contention on a Chip Multi-Processor Architecture. In: Proceedings of the 11th International Symposium on High-Performance Computer Architecture, HPCA, February 12-16, pp. 340-351. IEEE Computer Society, Washington (2005)
-
(2005)
Proceedings of the 11th International Symposium on High-Performance Computer Architecture, HPCA, February 12-16
, pp. 340-351
-
-
Chandra, D.1
Guo, F.2
Kim, S.3
Solihin, Y.4
-
16
-
-
0034826142
-
Analytical cache models with applications to cache partitioning
-
ACM, New York
-
Suh, G.E., Devadas, S., Rudolph, L.: Analytical cache models with applications to cache partitioning. In: Proceedings of the 15th International Conference on Supercomputing, ICS 2001, Sorrento, Italy, pp. 1-12. ACM, New York (2001)
-
(2001)
Proceedings of the 15th International Conference on Supercomputing, ICS 2001, Sorrento, Italy
, pp. 1-12
-
-
Suh, G.E.1
Devadas, S.2
Rudolph, L.3
-
17
-
-
0024656760
-
An analytical cache model
-
Agarwal, A., Hennessy, J., Horowitz, M.: An analytical cache model. ACM Trans. Comput. 7(2), 184-215 (1989)
-
(1989)
ACM Trans. Comput.
, vol.7
, Issue.2
, pp. 184-215
-
-
Agarwal, A.1
Hennessy, J.2
Horowitz, M.3
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