The PERCS high-performance interconnect

Proceedings - 18th IEEE Symposium on High Performance Interconnects, HOTI 2010

Volumn , Issue , 2010, Pages 75-82

  Arimilli, Baba ^a   Arimilli, Ravi ^a   Chung, Vicente ^a   Clark, Scott ^a   Denzel, Wolfgang ^b   Drerup, Ben ^a   Hoefler, Torsten ^c   Joyner, Jody ^a   Lewis, Jerry ^a   Li, Jian ^b   Ni, Nan ^a   Rajamony, Ram ^b  

^a IBM   (United States)

^b IBM AUSTIN RESEARCH LABORATORY   (United States)

^c UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

Author keywords

High performance computing; Interconnect; Topology

Indexed keywords

BANDWIDTH; TOPOLOGY;

BISECTION BANDWIDTH; COLLECTIVE COMMUNICATION OPERATIONS; GLOBAL ADDRESS SPACES; HIGH PERFORMANCE COMPUTING; HIGH PERFORMANCE COMPUTING SYSTEMS; HIGH-PERFORMANCE INTERCONNECT; INTERCONNECT; OPTICAL ELECTRONICS;

INTEGRATED CIRCUIT INTERCONNECTS;

EID: 77958110333     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HOTI.2010.16     Document Type: Conference Paper

References (10)

1. Blue Waters Sustained Petascale Computing, Project Office. http://www.ncsa.illinois.edu/BlueWaters/, 2010. accessed July 2010.
2. P. Charles, C. Grothoff, V. A. Saraswat, C. Donawa, A. Kielstra, K. Ebcioglu, C. von Praun, and V. Sarkar. X10: an object-oriented approach to non-uniform cluster computing. Proceedings of the 20th Annual ACM SIGPLAN Conference on Object-Oriented Programming, Systems, Languages, and Applications (OOPSLA) 2005, pages 519-538, 2005.
3. U. Consortium. UPC Language Specifications, v1.2. Technical report, Lawrence Berkeley National Laboratory, 2005. LBNL-59208.
4. W. Dally and B. Towles. Principles and Practices of Interconnection Networks. Morgan Kaufmann Publishers Inc., San Francisco, CA, USA, 2003.
5. J. Dongarra and P. Luszczek. Introduction to the HPCChallenge Benchmark Suite. Technical report, ICL Technical Report, 10 2005. ICL-UT-05-01.
6. J. L. Hennessy and D. A. Patterson. Computer Architecture: A Quantitative Approach. Morgan Kaufmann Publishers, third edition, 2003.
7. IBM. Power Instruction Set Architecture, 2009.
8. MPI Forum. MPI: A Message-Passing Interface Standard. Version 2.2, September 4th 2009.
9. R. W. Numrich and J. Reid. Co-array fortran for parallel programming. SIGPLAN Fortran Forum, 17(2):1-31, 1998.
10. TOP500. http://www.top500.org/, 2006. accessed July 2010.