A large σvTH/VDD tolerant zigzag 8T SRAM with area-efficient decoupled differential sensing and fast write-back scheme

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2010, Pages 103-104

  Wu, Jui Jen ^a,b   Chen, Yen Huei ^a,b   Chang, Meng Fan ^a   Chou, Po Wei ^a   Chen, Chien Yuan ^a   Liao, Hung Jen ^b   Chen, Ming Bin ^c   Chu, Yuan Hua ^c   Wu, Wen Chin ^c   Yamauchi, Hiroyuki ^d  

^a NATIONAL TSING HUA UNIVERSITY   (Taiwan)

^b TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY   (Taiwan)

^c INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE   (Taiwan)

^d FUKUOKA INSTITUTE OF TECHNOLOGY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

6T-SRAM; AREA EFFICIENT; LOW POWER; SINGLE-ENDED; WRITE-BACK;

SIGNAL ANALYSIS; STATIC RANDOM ACCESS STORAGE;

VLSI CIRCUITS;

EID: 77958018225     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIC.2010.5560337     Document Type: Conference Paper

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