A 32nm 8.3GHz 64-entry × 32b variation tolerant near-threshold voltage register file

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2010, Pages 105-106

  Agarwal, Amit ^a   Hsu, Steven ^a   Mathew, Sanu ^a   Anders, Mark ^a   Kaul, Himanshu ^a   Sheikh, Farhana ^a   Krishnamurthy, Ram ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CONTENTION-FREE; MEMORY CELL; REGISTER FILES; TRANSMISSION GATE;

ENERGY EFFICIENCY; THRESHOLD VOLTAGE;

VLSI CIRCUITS;

EID: 77958012642     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIC.2010.5560334     Document Type: Conference Paper

References (4)

1. A. Wang et al, 2004 ISSCC Digest, pp. 292-293.
2. H. Hara et al, 2003 ISSCC Digest, pp. 106-107.
3. S. Natarajan et al, 2008 IEDM Digest, paper 27.9.
4. S. Hsu et al, 2006 ISSCC Digest, pp. 448-449.