A 1.2mW on-line learning mixed mode intelligent inference engine for robust object recognition

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2010, Pages 17-18

  Oh, Jinwook ^a   Lee, Seungjin ^a   Kim, Minsu ^a   Kwon, Joonsoo ^a   Park, Junyoung ^a   Kim, Joo Young ^a   Yoo, Hoi Jun ^a  

^a Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

CLASSIFICATION ACCURACY; CMOS PROCESSS; HIGH SPEED; LOW POWER; MIXED MODE; NEURO-FUZZY; ONLINE LEARNING; POWER CONSUMPTION; PROCESSING DELAY; RECOGNITION ACCURACY; ROBUST OBJECT RECOGNITION; US OPERATIONS;

ANALOG CIRCUITS; CMOS INTEGRATED CIRCUITS; DIGITAL CIRCUITS; INFERENCE ENGINES; OBJECT RECOGNITION;

VLSI CIRCUITS;

EID: 77958011648     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIC.2010.5560256     Document Type: Conference Paper

References (6)

1. J.Y. Kim, et al., "A 201.4GOPS 496mW Real-Time Multi-Object Recognition Processor with Bio-Inspired Neural Perception Engine," in IEEE ISSCC, pp.150-151, Feb., 2009.
2. S. Lee, et al., "A 345mW Heterogeneous Many-core Processor with an Intelligent Inference Engine for Robust Object Recognition," in IEEE ISSCC, Feb., 2010. Session 18.4
3. J. -S.R. Jang, "ANFIS: Adaptive-network-based fuzzy inference system," in IEEE Transactions on Systems, Man, and Cybernetics, vol. 23, no.3, pp.665-685, May 1993.
4. M. Jabri, "Weight Perturbation: An Optimal Architecture and Learning Technique for Analog VLSI Feedforward and Recurrent Multilayer Network," in Neural Computation, vol. 3, no. 4, pp. 546-564, May, 1991.
5. R. Sarpeshkar, "Analog Versus Digital: Extrapolating from Electronics to Neurobiology," in Neural Computation, vol. 10, pp. 1601-1038, Mar. 1998.
6. M. Kim, et al., "A 22.8 GOPS 2.83mW Neuro-fuzzy Object Detection Engine for Fast Multi-object Recognition," in IEEE Symposium on VLSI. Jun., 2009.