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Volumn , Issue , 2010, Pages 111-112

An over 20,000 quality factor on-chip relaxation oscillator using Power Averaging Feedback with a Chopped Amplifier

Author keywords

1 f noise reduction; Low phase noise; On chip oscillator; Relaxation oscillator

Indexed keywords

1/F NOISE; DIGITAL AUDIO; LOW PHASE NOISE; LOW-NOISE APPLICATIONS; LOW-POWER CONSUMPTION; MEMS OSCILLATORS; ON CHIPS; ON-CHIP OSCILLATORS; QUALITY FACTORS; RAIL-TO-RAIL; SMALL AREA; SYSTEM ON A CHIP;

EID: 77957997693     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIC.2010.5560332     Document Type: Conference Paper
Times cited : (22)

References (4)
  • 2
    • 70349291212 scopus 로고    scopus 로고
    • An on-chip CMOS relaxation oscillator with power averaging feedback using a reference proportional to supply voltage
    • Feb.
    • Y. Tokunaga, S. Sakiyama, A. Matsumoto, S. Dosho, "An on-chip CMOS relaxation oscillator with power averaging feedback using a reference proportional to supply voltage," IEEE International Solid-State Circuits Conference, Feb. 2009, pp.404-405.
    • (2009) IEEE International Solid-State Circuits Conference , pp. 404-405
    • Tokunaga, Y.1    Sakiyama, S.2    Matsumoto, A.3    Dosho, S.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.