Low-power sub-threshold design of secure physical unclonable functions

Proceedings of the International Symposium on Low Power Electronics and Design

Volumn , Issue , 2010, Pages 43-48

  Lin, Lang ^a   Holcomb, Dan ^b   Krishnappa, Dilip Kumar ^a   Shabadi, Prasad ^a   Burleson, Wayne ^a  

^a University of Massachusetts   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Embedded system security; Physical unclonable function; RFID; Sub threshold circuits

Indexed keywords

CMOS TECHNOLOGY; DESIGN OPTIMIZATION; HIGH SENSITIVITY; LAYOUT DESIGNS; LOW POWER; LOW SUPPLY VOLTAGES; LOW-POWER CONSUMPTION; MODELING PROCESS; PHYSICAL UNCLONABLE FUNCTIONS; POWER-DELAY PRODUCTS; PROCESS VARIATION; RFID; SECURITY APPLICATION; SIDE-CHANNEL ANALYSIS; SUB-THRESHOLD DESIGN; SUBTHRESHOLD; SUPPLY VOLTAGES; WIRELESS SENSING;

ACCESS CONTROL; CMOS INTEGRATED CIRCUITS; DESIGN; EMBEDDED SYSTEMS; OPTIMIZATION; POWER ELECTRONICS; SENSITIVITY ANALYSIS; THRESHOLD ELEMENTS;

THRESHOLD VOLTAGE;

EID: 77957943386     PISSN: 15334678     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1840845.1840855     Document Type: Conference Paper

References (27)

1. B. Gassend, D. Clarke, M. Van Dijk, and S. Devadas. Silicon physical random functions. In Proceedings of the 9th ACM conference on Computer and communications security, pages 148-160, 2002.
2. R. S. Pappu, B. Recht, J. Taylor, and N. Gershenfeld. Physical one-way functions. Science, 297(6):2026-2030, 2002.
3. G. E. Suh and S. Devadas. Physical unclonable functions for device authentication and secret key generation. In ACM/IEEE Design Automation Conference, pages 9-14, 2007.
4. J. Guajardo, S. S. Kumar, G. Schrijen, and P. Tuyls. FPGA intrinsic PUFs and their use for IP protection. In Proceedings of the Workshop on Cryptographic Hardware and Embedded Security, pages 63-80, September 2007.
5. D. E. Holcomb, W. P. Burleson, and K. Fu. Power-up SRAM State as an Identifying Fingerprint and Source of True Random Numbers. IEEE Transactions on Computers, 58(9):1198-1210, 2009.
6. D. Halperin, T. S. Heydt-Benjamin, B. Ransford, S. S. Clark, B. Defend, W. Morgan, K. Fu, T. Kohno, and W. H. Maisel. Pacemakers and implantable cardiac defibrillators: Software radio attacks and zero-power defenses. In Proceedings of Symposium on Security and Privacy, pages 129-142, 2008.
7. T. S. Heydt-Benjamin, D. V. Bailey, K. Fu, A. Juels, and T. OHare. Vulnerabilities in First-Generation RFID-enabled Credit Cards. In Financial Cryptography, 2007.
8. Y. Oren and A. Shamir. Remote password extraction from RFID tags. IEEE Transactions on Computers, 56(9):1292-1296, 2007.
9. K. Nohl and D. Evans. Reverse-engineering a cryptographic RFID tag. In USENIX Security Symposium, pages 185-193, 2008.
10. A. Juels and S. A. Weis. Authenticating pervasive devices with human protocols. Lecture notes in computer science, 3621:293, 2005.
11. T. Eisenbarth, S. Kumar, C. Paar, A. Poschmann, and L. Uhsadel. A survey of lightweight-cryptography implementations. IEEE Design & Test of Computers, pages 522-533, 2007.
12. T. Popp, E. Oswald, and S. Mangard. Power analysis attacks and countermeasures. IEEE Design & Test of Computers, 24(6):535-543, 2007.
13. L. Lin and W. P. Burleson. Analysis and mitigation of process variation impacts on power-attack tolerance. In ACM/IEEE DAC, pages 238-243, 2009.
14. Verayo PUF RFID. http://www.verayo.com/product/pufr-d.html, 2008.
15. R. Maes, P. Tuyls, and I. Verbauwhede. Low-overhead implementation of a soft decision helper data algorithm for sram pufs. In CHES, pages 332-347. Springer-Verlag, 2009.
16. B. H. Calhoun, A. Wang, and A. P. Chandrakasan. Modeling and sizing for minimum energy operation in sub-threshold circuits. IEEE Journal of Solid-State Circuits, volume 40, pages 1778-1786, 2005.
17. S. Hanson, B. Zhai, D. Blaauw, D. Sylvester, A. Bryant, and X. Wang. Energy optimality and variability in subthreshold design. In ACM/IEEE ISLPED, pages 363-365, 2006. (Pubitemid 46609767)
18. V. Vivekraja and L. Nazhandali. Circuit-Level Techniques for Reliable Physically Uncloneable Functions. In IEEE HOST, pages 30-35, 2009.
19. International Technology Roadmap for Semiconductors. 2006 ITRS report, http://www.itrs.net/Links/2006Update/2006UpdateFinal.htm
20. D. Bol, D. Kamel, D. Flandre, and J. D. Legat. Nanometer mosfet effects on the minimum-energy point of 45nm subthreshold logic. In ISLPED, pages 3-8, 2009.
21. S. Devadas, E. Suh, S. Paral, R. Sowell, T. Ziola, and V. Khandelwal. Design and implementation of puf-based "unclonable" RFID ICs for anti-counterfeiting and security applications. In IEEE International Conference on RFID, pages 58-64, 2008.
22. D. Lim. Extracting secret keys from integrated circuits. M.S. thesis Cambridge: Dept. Elect. Eng. Comput. Sci., Massachusetts Inst. Technol., May 2004.
23. M. Majzoobi, F. Koushanfar, and M. Potkonjak. Lightweight secure pufs. In ICCAD, pages 670-673, 2008.
24. B. E. Boser, I. M. Guyon, and V. N. Vapnik. A training algorithm for optimal margin classifiers. In Proceedings of the fifth annual workshop on Computational learning theory, pages 144-152, 1992.
25. T. Joachims. Making large scale SVM learning practical. http://svmlight.joachims.org/, 1999.
26. S. Mangard, E. Oswald, and T. Popp. Power Analysis Attacks: Revealing the Secrets of Smart Cards. Springer-Verlag New York, Inc., 2007.
27. D. Lim, J. W. Lee, B. Gassend, G. E. Suh, M. Van Dijk, and S. Devadas. Extracting secret keys from integrated circuits. IEEE Transactions on VLSI, 13(10):1200-1205, 2005.