World's first monolithic 3D-FPGA with TFT SRAM over 90nm 9 layer Cu CMOS

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2010, Pages 219-220

  Naito, T ^a   Ishida, T ^a   Onoduka, T ^a,b   Nishigoori, M ^a   Nakayama, T ^a   Ueno, Y ^a   Ishimoto, Y ^a   Suzuki, A ^a   Chung, W ^a   Madurawe, R ^a,c   Wu, S ^a,c   Ikeda, S ^a,d   Oyamatsu, H ^a  

^a TOSHIBA CORPORATION   (Japan)

^b Nissei Bldg   (Japan)

^c Tier Logic Inc   (Japan)

^d Tei Technology   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

3-DIMENSIONAL; AMORPHOUS SI; BREAKTHROUGH INNOVATIONS; CMOS DEVICES; CU INTERCONNECT; CU-INTERCONNECTS; E-FIELD; FULLY SILICIDED GATES; GATE OXIDE; LOW TEMPERATURES; MASS PRODUCTION; METAL FEATURES; MONOLITHICALLY INTEGRATED; TRANSISTOR GATE LENGTH;

AMORPHOUS SILICON; COPPER; FIELD EFFECT TRANSISTORS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); INNOVATION; SILICIDES; STATIC RANDOM ACCESS STORAGE; TECHNOLOGY; THIN FILM CIRCUITS; THREE DIMENSIONAL; VLSI CIRCUITS;

CMOS INTEGRATED CIRCUITS;

EID: 77957872200     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIT.2010.5556234     Document Type: Conference Paper

References (6)

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4. T. Marukame et al., IEDM Tech. Dig. p215, 2009.
5. R. Madurawe, US 6747478, 7112994, 6828689, 7268580.
6. Y. Kaneko et al., Jpn. J. Phys., Vol. 41, 2002, 913.