Enhanced prformance in SOI FinFETs with low series resistance by aluminum implant as a solution beyond 22nm node

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2010, Pages 17-18

  Ok, I ^a   Young, C D ^a   Loh, W Y ^a   Ngai, T ^a   Lian, S ^a   Oh, J ^a   Rodgers, M P ^a   Bennett, S ^a   Stamper, H O ^a   Franca, D L ^a   Lin, S ^a,b   Akarvardar, K ^a,c   Smith, C ^a   Hobbs, C ^a   Kirsch, P ^a   Jammy, R ^a  

^a SEMATECH   (United States)

^b UMC   (United States)

^c IBM MICROELECTRONICS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATION; FINFETS; GATE STACKS; HIGH-PERFORMANCE TECHNOLOGIES; SCHOTTKY BARRIER HEIGHTS; SERIES RESISTANCES; SHORT-CHANNEL EFFECT; SOI FINFETS;

DRAIN CURRENT; FIELD EFFECT TRANSISTORS; SCHOTTKY BARRIER DIODES; SILICIDES;

SEMICONDUCTING SILICON COMPOUNDS;

EID: 77957867886     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIT.2010.5556138     Document Type: Conference Paper

References (5)

1. C. Y. Chang, et al., 12.2.1, IEDM 2009.
2. C. E. Smith, et al., 12.6.1, IEDM 2009.
3. R. T. P. Lee, et al., pp. 28-29 VLSI 2008.
4. M. Sinha, et al., pp. 106-107 VLSI 2009.
5. S. Bangsaruntip, et al., 12.3.1, IEDM 2009.