Low power Loadless 4T SRAM cell based on degenerately doped source (DDS) In0.53Ga0.47As Tunnel FETs

Device Research Conference - Conference Digest, DRC

Volumn , Issue , 2010, Pages 101-102

  Saripalli, V ^a   Mohata, D K ^a   Mookerjea, S ^a   Datta, S ^a   Narayanan, V ^a  

^a PENNSYLVANIA STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

4T SRAM; 6T-SRAM; ACCESS TIME; BIT-FLIPS; CELL STABILITY; DRIVE DEVICES; LEAKAGE ENERGIES; LOW LEAKAGE; LOW POWER; N-CHANNEL; P-TYPE; SOURCE DOPING; SOURCE-DRAIN; SRAM CELL; SUBTHRESHOLD; TEMPERATURE DEPENDENT; TUNNEL FET; WRITE OPERATIONS;

DOPING (ADDITIVES); GALLIUM; MESFET DEVICES;

STATIC RANDOM ACCESS STORAGE;

EID: 77957597285     PISSN: 15483770     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DRC.2010.5551859     Document Type: Conference Paper

References (3)

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3. J. Knoch, et al., Solid State Electronics., 51, pp 572-578, (2007).