Modeling and analysis of read (RD) disturb in 1T-1STT MTJ memory bits

Device Research Conference - Conference Digest, DRC

Volumn , Issue , 2010, Pages 43-44

  Raychowdhury, Arijit ^a   Somasekhar, Dinesh ^a   Karnik, Tanay ^a   De, Vivek K ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANALYTICAL MODEL; HIGH-CURRENT; MEMORY BITS; MODEL STUDY; MODELING AND ANALYSIS; NUMERICAL SIMULATION; SHORT-PULSED;

MATHEMATICAL MODELS;

COMPUTER SIMULATION;

EID: 77957564965     PISSN: 15483770     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DRC.2010.5551946     Document Type: Conference Paper

References (4)

1. A Raychowdhury et. al., IEDM 2009, Paper-30.3.
2. K. Ono, et. al., IEDM 2009, Paper-9.3.
3. J. Z. Sun, PRB, 2000, 62 (1).
4. J. He et. al., JAP, 2007, 101(09A501).