WearMon: Reliability monitoring using adaptive critical path testing

Proceedings of the International Conference on Dependable Systems and Networks

Volumn , Issue , 2010, Pages 151-160

  Zandian, Bardia ^a   Dweik, Waleed ^a   Kang, Suk Hun ^a   Punihaole, Thomas ^a   Annavaram, Murali ^a  

^a University of Southern California ^*  (United States)

Author keywords

Critical paths; Reliability; Timing margins

Indexed keywords

CIRCUIT UNDER TEST; COMPLEXITY BASED; CRITICAL PATHS; DESIGN CONSTRAINTS; FPGA IMPLEMENTATIONS; MONITORING ARCHITECTURE; NORMAL OPERATIONS; PROCESSOR RELIABILITY; RELIABILITY MONITORING; SIGNAL PATHS; TEST PATTERN; TEST RESULTS; TIMING MARGIN;

COMPUTER ARCHITECTURE; NETWORK ARCHITECTURE; RELIABILITY; TESTING; TIME MEASUREMENT;

MONITORING;

EID: 77956573621     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DSN.2010.5544916     Document Type: Conference Paper

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