Phase-change chalcogenide nonvolatile ram completely based on CMOS technology

International Symposium on VLSI Technology, Systems, and Applications, Proceedings

Volumn 2003-January, Issue , 2003, Pages 29-31

  Hwang, Y N ^a   Hong, J S ^a   Lee, S H ^a   Ahn, S J ^a   Jeong, G T ^a   Koh, G H ^a   Kim, H J ^a   Jeong, W C ^a   Lee, S Y ^a   Park, J H ^a   Ryoo, K C ^a   Horii, H ^a   Ha, Y H ^a   Yi, J H ^a   Cho, W Y ^a   Kim, Y T ^a   Lee, K H ^a   Joo, S H ^a   Park, S O ^a   Jeong, U I ^a   Jeong, H S ^a   Kim, Kinam ^a   more..

^a SAMSUNG Electronics   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

CHALCOGENIDES; CMOS INTEGRATED CIRCUITS; RANDOM ACCESS STORAGE;

CHALCOGENIDE RANDOM ACCESS MEMORY; CLAMPING CIRCUITS; CMOS TECHNOLOGY; DRIVING CURRENT; FABRICATION TOLERANCES; NON-VOLATILE RAMS; PHASE CHANGE; SENSING SIGNALS;

PHASE CHANGE MEMORY;

EID: 77956545798     PISSN: 19308868     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VTSA.2003.1252543     Document Type: Conference Paper

References (2)

1. R. Neale, Amorphous Nonvolatile Memory: the past and the future. Electronic Engineering, April 2001, pp. 67-78.
2. M. Gill, T. Lowrey and J. Park, Ovonic Unified Memory - A High-performance Nonvolatile Memory Technology for Stand Alone Memory and Embedded Applications, TD 12.4, Proceedings of ISSC2002.