Comparison of FPGA and GPU implementations of real-time stereo vision

2010 IEEE Computer Society Conference on Computer Vision and Pattern Recognition - Workshops, CVPRW 2010

Volumn , Issue , 2010, Pages 9-15

  Kalarot, Ratheesh ^a   Morris, John ^a  

^a UNIVERSITY OF AUCKLAND   (New Zealand)

Author keywords

[No Author keywords available]

Indexed keywords

AUTONOMOUS NAVIGATION; GPU IMPLEMENTATION; HIGH RESOLUTION IMAGE; HIGH SPEED; IMAGE SIZES; INHERENT PARALLELISM; LOW SPEED; PARALLEL IMPLEMENTATIONS; PRACTICAL SYSTEMS; REAL TIME STEREO; RELATIVE STRENGTH; SCENE INTERPRETATION; SINGLE PROCESSORS; STEREO CORRESPONDENCES; STEREO MATCHING;

COMPUTER VISION; MATERIALS HANDLING; PLANT LAYOUT; REAL TIME SYSTEMS; SIGNAL FILTERING AND PREDICTION; TECHNICAL PRESENTATIONS;

STEREO VISION;

EID: 77956500927     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CVPRW.2010.5543743     Document Type: Conference Paper

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