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Volumn , Issue , 2010, Pages 693-698

A complete design-flow for the generation of ultra low-power WSN node architectures based on micro-tasking

Author keywords

Hardware specialization; Low power design; Microcoded architecture; WSN node

Indexed keywords

ARCHITECTURAL MODELS; EMBEDDED SYSTEM DESIGN; LOW POWER; LOW-POWER DESIGN; LOW-POWER MICROCONTROLLERS; MICROCODED ARCHITECTURE; MICROTASKS; NEW TECHNOLOGIES; NODE ARCHITECTURES; ORDERS OF MAGNITUDE; POWER DISSIPATION; POWER SAVINGS; POWER-GATING; RESEARCH FIELDS; STRINGENT CONSTRAINTS; WSN NODE;

EID: 77956199726     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1837274.1837450     Document Type: Conference Paper
Times cited : (17)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.