Bridging pre-silicon verification and post-silicon validation

Proceedings - Design Automation Conference

Volumn , Issue , 2010, Pages 94-95

  Nahir, Amir ^a   Ziv, Avi ^a   Galivanche, Rajesh ^b   Hu, Alan ^c   Abramovici, Miron ^d   Bentley, Bob ^b   Bertacco, Valeria ^e   Camilleri, Albert ^f   Foster, Harry ^g   Kapoor, Shakti ^h  

^a IBM HAIFA RESEARCH LAB   (Israel)

^b INTEL CORPORATION   (United States)

^c UNIVERSITY OF BRITISH COLUMBIA   (Canada)

^d Tiger's Lair   (United States)

^e UNIVERSITY OF MICHIGAN   (United States)

^f QUALCOMM INC   (United States)

^g MENTOR GRAPHICS CORPORATION   (United States)

^h IBM   (United States)

Author keywords

Post silicon; Pre silicon; Validation; Verification

Indexed keywords

FUNCTIONAL VERIFICATION; POST-SILICON; PRE-SILICON; SILICON TECHNOLOGIES; VALIDATION; VERIFICATION PROCESS;

COMPUTER AIDED DESIGN;

EID: 77956195816     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1837274.1837300     Document Type: Conference Paper

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