|
Volumn , Issue , 2010, Pages 1943-1946
|
Neural dynamics in reconfigurable silicon
|
Author keywords
[No Author keywords available]
|
Indexed keywords
ANALOG CHIPS;
AREA EFFICIENCY;
CENTRAL PATTERN GENERATOR;
DIGITAL SYSTEM;
FLOATING GATE TRANSISTORS;
INHIBITORY SYNAPSIS;
INTEGRATE-AND-FIRE NEURONS;
NEURAL COMPUTATIONS;
NEURAL DYNAMICS;
NEUROMORPHIC;
NEURON DYNAMICS;
ON CHIPS;
PROGRAMMABILITY;
RE-CONFIGURABLE;
SWITCH MATRIX;
SYNAPTIC WEIGHT;
COMPUTATIONAL EFFICIENCY;
HOPF BIFURCATION;
NEURAL NETWORKS;
NEURONS;
FABRICS;
|
EID: 77955998108
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/ISCAS.2010.5536960 Document Type: Conference Paper |
Times cited : (2)
|
References (8)
|