A 4x4 64-QAM reduced-complexity K-best MIMO detector up to 1.5Gbps

ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems

Volumn , Issue , 2010, Pages 3953-3956

  Tsai, Pei Yun ^a   Chen, Wei Tzuo ^a   Lin, Xing Cheng ^a   Huang, Meng Yuan ^a  

^a NATIONAL CENTRAL UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CLOCK CYCLES; CLOCK FREQUENCY; CMOS TECHNOLOGY; DETECTION PROBLEMS; DETECTION RATES; HARDWARE COMPLEXITY; HIGH-SPEED APPLICATIONS; K-VALUES; MIMO DETECTORS; MULTIPLE-INPUT-MULTIPLE-OUTPUT; POST LAYOUT SIMULATION; REDUCED-COMPLEXITY; SPHERE DECODERS; VLSI ARCHITECTURES;

CMOS INTEGRATED CIRCUITS; DECODING; DETECTORS; FABRICS; MIMO SYSTEMS; SPHERES;

VLSI CIRCUITS;

EID: 77955997174     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2010.5537675     Document Type: Conference Paper

References (7)

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