Development of low temperature dielectrics down to 150°C for multiple TSVs structure with Wafer-on-Wafer (WOW) technology

2010 IEEE International Interconnect Technology Conference, IITC 2010

Volumn , Issue , 2010, Pages

  Kitada, H ^a,b   Maeda, N ^b   Fujimoto, K ^c   Mizushima, Y ^a   Nakata, Y ^a   Nakamura, T ^a   Lee, W ^d   Kwon, Y S ^d   Ohba, T ^b  

^a FUJITSU LABORATORIES LTD   (Japan)

^b UNIVERSITY OF TOKYO   (Japan)

^c DAI NIPPON PRINTING CO LTD   (Japan)

^d ATTO Co Ltd R and D Center   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

BARRIER LAYERS; BREAKDOWN VOLTAGE; CRITICAL DENSITY; CU DIFFUSION; DEPOSITION TEMPERATURES; ELECTRICAL RESISTANCES; FILM DENSITY; LOW TEMPERATURES; ON-WAFER; SI SUBSTRATES; SION FILM; THROUGH SILICON VIAS;

CHEMICAL VAPOR DEPOSITION; COPPER; NITRIDES; PLASMA DEPOSITION; SILICON WAFERS; TECHNOLOGY;

SEMICONDUCTING SILICON COMPOUNDS;

EID: 77955622562     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IITC.2010.5510744     Document Type: Conference Paper

References (6)

1. N. Maeda, et al., Proc. of Advanced Metallization Conference, (2008) p 91
2. T. Ohba, et al., Microelectronic Eng. Vol. 87 (3) (2010) p 485
3. H. Kitada, et al., IEEE IITC (2009) p 107
4. Y. S. Kim et al. IEEE IEDM Tech. Dig., (2009) p 365
5. D. Abe, et al. Proc. of Advanced Metallization Conference, (2009) p 32
6. H. Kudo et al. IEEE IITC (2009) p 117