Robust spin-on glass gap-fill process technology for sub-30nm interlayer dielectrics

2010 IEEE International Interconnect Technology Conference, IITC 2010

Volumn , Issue , 2010, Pages

  Byun, Kyung Mun ^a   Jung, Deok Young ^a   Lee, Jun Won ^a   Lee, Seungheon ^a   Kim, Hyongsoo ^a   Kim, Mun Jun ^a   Hong, Eunkee ^a   Gang, Mansug ^a   Nam, Seok Woo ^a   Moon, Joo Tae ^a   Chung, Chilhee ^a   Lee, Jung Hoo ^a   Lee, Hyo Sug ^b  

^a SAMSUNG Electronics   (South Korea)

^b Samsung Advanced Institute of Technology (SAIT)   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

BAKING TEMPERATURE; CAPILLARY EFFECTS; CONTACT BRIDGE; FILL PROCESS; FILLING BEHAVIOR; INTER-LAYER DIELECTRICS; PROCESS REFINEMENT; SPIN-ON GLASS; SURFACE WETTABILITY;

BLOOD VESSELS; COATINGS; DIELECTRIC MATERIALS; FILLING; GLASS; OPTIMIZATION; SURFACE TREATMENT; TECHNOLOGY;

SPIN GLASS;

EID: 77955613081     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IITC.2010.5510709     Document Type: Conference Paper

References (3)

1. J. Goo et al., "A highly manufacturable, low-thermal budget, void and seam free pre-metal-dielectric process using new SOG for beyond 60nm DRAM and other devices," IEDM Tech. Dig., pp. 271-274, 2001.
2. A. Das et al, "Phosphorous doped SOG as a pre-metal-dielectric for sub-50nm technology nodes," Microelectronic Eng., vol. 85, pp. 2085-2088, 2008.
3. E. J. Shaughnessy, Jr., I. M. Katz and J. P. Schaffer, Introduction to Fluid Mechanics, 1st ed., Oxford University Press, 2005, Chap.2.