Way adaptable D-NUCA caches

International Journal of High Performance Systems Architecture

Volumn 2, Issue 3-4, 2010, Pages 215-228

  Bardine, Alessandro ^a   Comparetti, Manuel ^a   Foglia, Pierfrancesco ^a   Gabrielli, Giacomo ^a   Prete, Cosimo Antonio ^a  

^a UNIVERSITY OF PISA   (Italy)

Author keywords

Cache memories; High performance systems architecture; Non uniform cache architecture; NUCA; Power saving techniques; Reconfigurable architectures; Way adaptable D NUCA

Indexed keywords

BUFFER STORAGE; MEMORY ARCHITECTURE; NETWORK ARCHITECTURE; PRODUCT DESIGN; RECONFIGURABLE ARCHITECTURES;

HIGH PERFORMANCE SYSTEMS; NON-UNIFORM CACHE ARCHITECTURE; NUCA; POWER SAVINGS; WAY ADAPTABLE D-NUCA;

CACHE MEMORY;

EID: 77955375569     PISSN: 17516528     EISSN: 17516536     Source Type: Journal    
DOI: 10.1504/IJHPSA.2010.034542     Document Type: Article

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