Synthesis of small reversible and pseudo-reversible circuits using Y-gates and inverse Y-gates

Proceedings of The International Symposium on Multiple-Valued Logic

Volumn , Issue , 2010, Pages 245-251

  Perkowski, Marek ^a,b   Alhagi, Nouraddin ^a,b   Lukac, Martin ^a,b   Saxena, Neha ^a,b   Blakely, Scott ^a,b  

^a PORTLAND STATE UNIVERSITY   (United States)

^b TOHOKU UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

EXHAUSTIVE SEARCH ALGORITHMS; INPUT AND OUTPUTS; NEW TECHNOLOGIES; REVERSIBLE CIRCUITS; REVERSIBLE GATES; REVERSIBLE LOGIC; STANDARD MODEL;

LEARNING ALGORITHMS; MANY VALUED LOGICS;

LOGIC GATES;

EID: 77955325952     PISSN: 0195623X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISMVL.2010.53     Document Type: Conference Paper

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