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Volumn 33, Issue 2, 2010, Pages 129-134
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Advanced package prototyping using nano-particle silver printed interconnects
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Author keywords
Chip first; Embedded actives; High density interconnect; Nano particle silver; Rapid prototyping
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Indexed keywords
ACTIVE PACKAGING;
ACTIVE PROCESS;
BULK METALS;
CARRIER SUBSTRATE;
CHIP PROCESSING;
CHIP TECHNOLOGY;
CIRCUIT PATTERNING;
DATA-DRIVEN;
DIELECTRIC LAYER;
DIRECT PRINTING;
DRY PROCESS;
ELECTRICAL CIRCUIT;
EMBEDDED ACTIVE;
FAILURE MODE ANALYSIS;
FLIP CHIP SOLDER BUMP;
HIGH-DENSITY;
HIGH-DENSITY INTERCONNECT;
IC FABRICATION;
JET PRINTING;
LEADTIME;
LOW-VOLUME PRODUCTION;
MANUFACTURING COST;
METAL PAD;
MICRO-SYSTEM PACKAGING;
NANO-PARTICLE METAL;
NANO-PARTICLE SILVER;
PACKAGE PROTOTYPING;
PACKAGING PROCESS;
PLANAR SURFACE;
POLYIMIDE FILM;
PROCESS COMPLEXITY;
PROCESSING CONDITION;
RELIABILITY CHARACTERIZATION;
RELIABILITY PERFORMANCE;
SUBSTRATE COMPOSITION;
SYSTEM PACKAGING;
THERMOPLASTIC ADHESIVE;
VACUUM SPUTTERING;
WET CHEMISTRY;
ABLATION;
CONCURRENT ENGINEERING;
COST REDUCTION;
ELECTRONIC EQUIPMENT MANUFACTURE;
FAILURE ANALYSIS;
FLIP CHIP DEVICES;
JOB ANALYSIS;
NANOPARTICLES;
PACKAGING;
POLYIMIDES;
POLYMERIC FILMS;
PRINTING;
QUALITY ASSURANCE;
RAPID PROTOTYPING;
RELIABILITY ANALYSIS;
SILVER;
SINTERING;
STAINLESS STEEL;
SUBSTRATES;
CHIP SCALE PACKAGES;
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EID: 77955086217
PISSN: 1521334X
EISSN: None
Source Type: Journal
DOI: 10.1109/TEPM.2010.2044887 Document Type: Article |
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Times cited : (16)
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References (6)
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