Interprocessor communication for high performance, explicit time integration

Engineering with Computers

Volumn 26, Issue 2, 2010, Pages 149-157

  Petropoulos, Georgios ^b   Fenves, Gregory L ^a  

^a The University of Texas at Austin   (United States)

^b NONE

Author keywords

Explicit finite elements; High performance and scalability; Parallel computation

Indexed keywords

ALTERNATIVE COMMUNICATION; AUTOTUNING; COMMUNICATION LIBRARY; DEGREE OF SCALABILITY; DESIGN TECHNIQUE; EXPLICIT FINITE ELEMENT ANALYSIS; EXPLICIT FINITE ELEMENTS; EXPLICIT TIME INTEGRATION; HARDWARE PLATFORM; INTER PROCESSOR COMMUNICATION; MULTI CORE; MULTICORE ARCHITECTURES; OPTIMAL COMBINATION; PARALLEL COMPUTATION; PERFORMANCE TESTS; PERFORMANCE VARIABILITY; POINT-TO-POINT COMMUNICATION; POINT-TO-POINT MESSAGING; SHARED CACHE; SOLUTION PHASE;

FINITE ELEMENT METHOD; OPTIMIZATION; SCALABILITY; SOFTWARE ARCHITECTURE; SOFTWARE DESIGN;

COMMUNICATION;

EID: 77954817910     PISSN: 01770667     EISSN: 14355663     Source Type: Journal    
DOI: 10.1007/s00366-010-0174-x     Document Type: Article

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