A high-performance fault-tolerant software framework for memory on commodity GPUs

Proceedings of the 2010 IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2010

Volumn , Issue , 2010, Pages

  Maruyama, Naoya ^a   Nukada, Akira ^a   Matsuoka, Satoshi ^a  

^a TOKYO INSTITUTE OF TECHNOLOGY   (Japan)

Author keywords

Fault tolerance; GPGPU; Memory soft errors

Indexed keywords

CHECK POINTING; CURRENT GENERATION; DATA CODING; FAULT-TOLERANT SOFTWARE; GPGPU; MATRIX MULTIPLICATION; MEMORY SOFT ERRORS; N BODY PROBLEM; PERFORMANCE STUDY; PROGRAMMABILITY; PROTOTYPE IMPLEMENTATIONS; SOFTWARE FRAMEWORKS; STANDARD ERRORS;

CODING ERRORS; DISTRIBUTED PARAMETER NETWORKS; DYNAMIC RANDOM ACCESS STORAGE; ERROR DETECTION; FAULT TOLERANCE; PROGRAM PROCESSORS; SOFTWARE PROTOTYPING;

QUALITY ASSURANCE;

EID: 77954020082     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IPDPS.2010.5470473     Document Type: Conference Paper

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