Intel® Itanium® floating-point architecture

Proceedings - International Symposium on Computer Architecture

Volumn , Issue , 2003, Pages

  Cornea, Marius ^a   Harrison, John ^a   Tang, Ping Tak Peter ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CLOCK FREQUENCY; ITANIUM; ITANIUM 2 PROCESSOR; ITANIUM PROCESSOR; ITANIUM PROCESSOR FAMILY; PROCESSOR ARCHITECTURES; REGISTER SETS;

COMPUTERS; DIGITAL ARITHMETIC; NANOTECHNOLOGY;

COMPUTER ARCHITECTURE;

EID: 77953603488     PISSN: 10636897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1275521.1275526     Document Type: Conference Paper

References (9)

1. Intel(R) Itanium(TM) Architecture Software Developer's Manual, Revision 2.0, Vol 1-4, Intel Corporation, December 2001
2. John Hennessy, David Patterson, "Computer Architecture - A Quantitative Approach", Morgan Kauffman Publishers, Inc., third edition, 2002
3. Peter Markstein, "IA-64 and Elementary Functions: Speed and Precision", Hewlett-Packard/Prentice-Hall 2000
4. Marius Cornea, John Harrison, Ping Tak Peter Tang, "Scientific Computing on Itanium-based Systems", Intel Press 2002
5. John Crawford, Jerry Huck, "Motivations and Design Approach for the IA-64 64-Bit Instruction Set Architecture", Oct. 1997, San Jose, http://www.intel.com/pressroom/archive/speeches/mpf1097c.htm
6. ANSI/IEEE Standard 754-1985, IEEE Standard for Binary Floating-Point Arithmetic, IEEE, New York, 1985
7. O. Moller, "Quasi double-precision in floating-point addition", BIT journal, Vol.5, 1965, pages 37-50
8. T. J. Dekker, "A Floating-Point Technique for Extending the Available Precision", Numerical Mathematics journal, Vol.18, 1971, pages 224-242
9. "Divide, Square Root, and Remainder Algorithms for the Itanium Architecture", Intel Corporation, Nov. 2000, http://www.intel.com/software/ products/opensource/libraries/numnote2.htm, http://developer.intel.com/software/ products/opensource/libraries/numdown2.htm