3D-integration of silicon devices: A key technology for sophisticated products

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2010, Pages 1678-1683

  Klumpp, A ^a   Ramm, P ^a   Wieland, R ^a  

^a Fraunhofer Institute Reliability and Microintegration   (Germany)

Author keywords

Solid liquid interdiffusion; Through silicon via

Indexed keywords

COST EFFECTIVENESS; ELECTRONICS PACKAGING; INTEGRATED CIRCUIT INTERCONNECTS; INTEGRATION; MICROSTRIP LINES; MINIATURE INSTRUMENTS; SILICON WAFERS;

COST-EFFECTIVE FABRICATION; ELECTRICAL SIGNAL; ELECTRONIC SYSTEMS; MULTILAYER STACKING; PREDICTED PERFORMANCE; SOLID-LIQUID; THROUGH-SILICON VIA (TSV) TECHNOLOGIES; THROUGH-SILICON-VIA;

THREE DIMENSIONAL INTEGRATED CIRCUITS;

EID: 77953096859     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/date.2010.5457085     Document Type: Conference Paper

References (15)

1. T. Graßl, P. Ramm et al, "Deposition of TEOS/O3 Oxide Layers for Application in Vertically Integrated Cicuit Technology", Proceedings of the first international Dielectrics for VLSI/ULSI Mulitlevel Interconnection Conference (1995) 382
2. S. Wolf, R.N. Tauber, "Silicon Processing for the VLSI Era Volume 1: Process Technology", Lattice Press (2000) 192 ff
3. D. Temple, C. A. Bower et al, in 2006 MRS symposium proceedings, volume 970, 0970-Y03-04, 115 (2007)
4. R. Wieland et al, in Smart Systems Integration 2007, 649, VDE Verlag GmbH (2007), ISBN 978-3-8007- 3009-3014
5. R. Ramm et al, in AMC 2001 proceedings, 159, ISBN 1-55899-670-2
6. K. Sakuma et al, in ECTC 2007 proceedings, 627, IEEE 1-4244-0985-3/07/
7. Bioh Kim, in 2006 MRS symposium proceedings, volume 970, 0970-Y06-02, 253 (2007)
8. S. Burkett, L. Schaper et al in 2006 MRS symposium proceedings, volume 970, 0970-Y06-01, 261 (2007)
9. Shi-Qing Wang et al in J. Vac. Sci. Technol. Vol. 14, Issue 3, 1846 (1996)
10. S.M. Rossnagel, H. Kim in 2001 proceedings IITC, 3-5 (2001)
11. C.K. Tsang et al, in Mater. Res. Soc. Symp. Proc. Vol. 970, (2007)
12. L. Bernstein and H. Bartolomew: Trans. Met. Soc. AIME 236 (1966) 404
13. L. Bernstein: J. Electrochem. Soc., Volume 113, Issue 12, pp. 1282-1288 (December 1966)
14. P. Ramm, A. Klumpp, R. Wieland: "3D-Integration of Integrated Circuits by Interchip Vias and Cu/Sn Solid Liquid Interdiffusion", Proceedings 6th VLSI Packaging Workshop of Japan, Tokyo (2002)
15. P. Ramm, A. Klumpp, R. Merkel, J. Weber, R. Wieland, A. Ostmann, J. Wolf: "3D System Integration Technologies", Proc. Materials Research Society Spring Meeting, San Francisco (2003), edited by A. J.M. McKerrow, J. Leu, O. Kraft, T. Kikkawa (Mater. Res. Soc. Proc. 766, Warrendale), pp. 3-14