Spatial avoidance of hardware faults using FPGA partial reconfiguration of tile-based soft processors

IEEE Aerospace Conference Proceedings

Volumn , Issue , 2010, Pages

  Gauer, Clint ^a   LaMeres, Brock J ^a   Racek, David ^a  

^a Montana State University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DAMAGED REGION; FPGA FABRIC; FPGA PARTIAL RECONFIGURATION; HARDWARE FAULTS; MANY-CORE; PARTIAL RECONFIGURATION; REAL TIME; RECOVERY PROCEDURE; SOFT PROCESSORS;

FABRICS; FAULT DETECTION;

COMPUTER ARCHITECTURE;

EID: 77952811378     PISSN: 1095323X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/AERO.2010.5446663     Document Type: Conference Paper

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