High-performance low-Vcc in-order core

Proceedings - International Symposium on High-Performance Computer Architecture

Volumn , Issue , 2010, Pages

  Abella, Jaume ^a   Chaparro, Pedro ^a   Vera, Xavier ^a   Carretero, Javier ^a   González, Antonio ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

SUPERCOMPUTERS;

ENERGY DELAY PRODUCT; MOBILE PLATFORM; OPERATING FREQUENCY; POWER DENSITIES; POWER OVERHEAD; READ-AFTER-WRITE; TECHNOLOGY NODES;

COMPUTER ARCHITECTURE;

EID: 77952577740     PISSN: 15300897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/hpca.2010.5416630     Document Type: Conference Paper

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