-
2
-
-
84893766434
-
Profile-based dynamic voltage scheduling using program checkpoints
-
A. Azevedo, I. Issenin, R. Cornea, R. Gupta, N. Dutt, A. Veidenbaum, and A. Nicolau. Profile-based dynamic voltage scheduling using program checkpoints. In DATE, 2002.
-
(2002)
DATE
-
-
Azevedo, A.1
Issenin, I.2
Cornea, R.3
Gupta, R.4
Dutt, N.5
Veidenbaum, A.6
Nicolau, A.7
-
3
-
-
0033666627
-
Design issues for dynamic voltage scaling
-
T. D. Burd and R.W. Brodersen. Design issues for dynamic voltage scaling. In ISLPED, 2000.
-
(2000)
ISLPED
-
-
Burd, T.D.1
Brodersen, R.W.2
-
4
-
-
3042560044
-
Fine-grained dynamic voltage and frequency scaling for precise energy and performance trade-off based on the ratio of off-chip access to on-chip computation times
-
K. Choi, R. Soma, and M. Pedram. Fine-grained dynamic voltage and frequency scaling for precise energy and performance trade-off based on the ratio of off-chip access to on-chip computation times. In IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems, 2004.
-
(2004)
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
-
-
Choi, K.1
Soma, R.2
Pedram, M.3
-
5
-
-
57349136667
-
Interaction-aware energy management for wireless network cards
-
I. Crk, M. Bi, and C. Gniady. Interaction-aware energy management for wireless network cards. In SIGMETRICS, 2008.
-
(2008)
SIGMETRICS
-
-
Crk, I.1
Bi, M.2
Gniady, C.3
-
6
-
-
58149401915
-
Context-aware mechanisms for reducing interactive delays of energy management in disks
-
I. Crk and C. Gniady. Context-aware mechanisms for reducing interactive delays of energy management in disks. In USENIX ATC, 2008.
-
(2008)
USENIX ATC
-
-
Crk, I.1
Gniady, C.2
-
7
-
-
0034775931
-
Automatic performance setting for dynamic voltage scaling
-
K. Flautner, S. Reinhardt, and T. Mudge. Automatic performance setting for dynamic voltage scaling. In MobiCom, 2001.
-
(2001)
MobiCom
-
-
Flautner, K.1
Reinhardt, S.2
Mudge, T.3
-
8
-
-
0029457297
-
Comparing algorithm for dynamic speed-setting of a low-power cpu
-
K. Govil, E. Chan, and H. Wasserman. Comparing algorithm for dynamic speed-setting of a low-power cpu. In MobiCom, 1995.
-
(1995)
MobiCom
-
-
Govil, K.1
Chan, E.2
Wasserman, H.3
-
9
-
-
0034878371
-
Hard real-time scheduling for low-energy using stochastic data and dvs processors
-
F. Gruian. Hard real-time scheduling for low-energy using stochastic data and dvs processors. In ISLPED, 2001.
-
(2001)
ISLPED
-
-
Gruian, F.1
-
10
-
-
0037659868
-
Single region vs. multiple regions: A comparison of different compiler-directed dynamic voltage scheduling approaches
-
C.-H. Hsu and U. Kremer. Single region vs. multiple regions: A comparison of different compiler-directed dynamic voltage scheduling approaches. In Workshop on PACS, 2002.
-
(2002)
Workshop on PACS
-
-
Hsu, C.-H.1
Kremer, U.2
-
11
-
-
0033699538
-
Run-time voltage hopping for low-power real-time systems
-
S. Lee and T. Sakurai. Run-time voltage hopping for low-power real-time systems. In DAC, 2000.
-
(2000)
DAC
-
-
Lee, S.1
Sakurai, T.2
-
12
-
-
23944519241
-
Using user interface event information in dynamic voltage scaling algorithms
-
J. R. Lorch. Using user interface event information in dynamic voltage scaling algorithms. In MASCOTS, 2003.
-
(2003)
MASCOTS
-
-
Lorch, J.R.1
-
13
-
-
0001914342
-
Improving dynamic voltage scaling algorithms with pace
-
J. R. Lorch and A. J. Smith. Improving dynamic voltage scaling algorithms with pace. In SIGMETRICS, 2001.
-
(2001)
SIGMETRICS
-
-
Lorch, J.R.1
Smith, A.J.2
-
15
-
-
0035279683
-
Intra-task voltage scheduling for low-energy, hard real-time applications
-
D. Shin, J. Kim, and S. Lee. Intra-task voltage scheduling for low-energy, hard real-time applications. IEEE Design and Testing, 2001.
-
(2001)
IEEE Design and Testing
-
-
Shin, D.1
Kim, J.2
Lee, S.3
-
18
-
-
77952973259
-
Process cruise control: Event-driven clock scaling for dynamic power management
-
A. Weissel and F. Bellosa. Process cruise control: event-driven clock scaling for dynamic power management. In CASES, 2002.
-
(2002)
CASES
-
-
Weissel, A.1
Bellosa, F.2
-
19
-
-
0037702246
-
Compile-time dynamic voltage scaling settings: Opportunities and limits
-
F. Xie, M. Martonosi, and S. Malik. Compile-time dynamic voltage scaling settings: Opportunities and limits. In PLDI, 2003.
-
(2003)
PLDI
-
-
Xie, F.1
Martonosi, M.2
Malik, S.3
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