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Volumn , Issue , 2009, Pages
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Co-optimizing process development, layout and circuit design for cost-effective 22nm technology platform
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Author keywords
[No Author keywords available]
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Indexed keywords
ADVANCED PROCESS;
CIRCUIT DESIGNS;
CO-OPTIMIZATION;
DENSITY SCALING;
MOORE'S LAW;
PHYSICAL LIMITATIONS;
PROCESS DEVELOPMENT;
TECHNOLOGICAL CHALLENGES;
TECHNOLOGY PLATFORMS;
AVAILABILITY;
ELECTRON DEVICES;
INTEGRATED CIRCUIT MANUFACTURE;
OPTIMIZATION;
DESIGN;
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EID: 77952367518
PISSN: 01631918
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/IEDM.2009.5424325 Document Type: Conference Paper |
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Times cited : (4)
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References (0)
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