High performance amorphous oxide thin film transistors with self-aligned top-gate structure

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2009, Pages

  Park, Jae Chul ^a   Kim, Sang Wook ^a   Kim, Sun Il ^a   Yin, Huaxiang ^a   Hur, Ji Hyun ^a   Jeon, Sang Hun ^a   Park, Sung Ho ^a   Hun Song, I ^a   Park, Young Soo ^a   Chung, U In ^a   Ryu, Myung Kwan ^a   Lee, Sangwon ^b   Kim, Sungchul ^b   Jeon, Yongwoo ^b   Kim, Dong Myong ^b   Kim, Dae Hwan ^b   Kwon, Kee Won ^c   Kim, Chang Jung ^a  

^a Samsung Advanced Institute of Technology (SAIT)   (South Korea)

^b Kookmin University   (South Korea)

^c Sungkyunkwan University   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

ACTIVE LAYER; AMORPHOUS OXIDES; AR PLASMAS; BIAS TEMPERATURE STRESS; CHANNEL ENGINEERING; CHANNEL REGION; CONDUCTIVE CHANNELS; DATA DRIVER; ELECTRICAL PROPERTY; FIELD-EFFECT MOBILITIES; GLASS SUBSTRATES; HIGH RESOLUTION DISPLAY; LARGE SIZES; LOW THRESHOLD VOLTAGE; SELF-ALIGNED; SOURCE/DRAIN REGIONS; SOURCE/DRAIN SERIES RESISTANCES; SUBMICRON; SUBTHRESHOLD SWING; TOP-GATE;

AMORPHOUS FILMS; ELECTRIC PROPERTIES; ELECTRON DEVICES; SUBSTRATES; THRESHOLD VOLTAGE;

THIN FILM TRANSISTORS;

EID: 77952350904     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2009.5424391     Document Type: Conference Paper

References (4)

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3. T. Kurita, Digest of Tech. Papers of Society for Information Display (SID), 986 (2001).
4. Y. Igarashi, T. Yamamoto, Y. Tanaka, J. Someya, Y. Nakakura, M. Yamakawa, S. Hasegawa, Y. Nishida, and T. Kurita, SID symposium digest-2003, 1039 (2003).