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Volumn , Issue , 2009, Pages

Demonstration of scaled 0.099μ2 FinFET 6T-SRAM cell using full-field EUV lithography for (Sub-)22nm node single-patterning technology

(50)  Veloso, A a   Demuynck, S a   Ercken, M a   Goethals, A M a   Locorotondo, S a   Lazzarino, F a   Altamirano, E a   Huffman, C a   De Keersgieter, A a   Brus, S a   Dem, M a   Struyf, H a   De Backer, J a   Hermans, J a   Delvaux, C a   Baudemprez, B a   Vandeweyer, T a   Van Roey, F a   Baerts, C a   Goossens, D a   more..


Author keywords

[No Author keywords available]

Indexed keywords

6T-SRAM; CELL TRANSISTOR; DEFECT-FREE GROWTH; DENSE ARRAYS; ELECTRICAL CHARACTERISTIC; EUV LITHOGRAPHY; FINFETS; FULL-FIELD; HIGH ASPECT RATIO; LOWER COST; METAL GATE; METALLIZATIONS; PATTERNING TECHNOLOGY; PROCESS LATITUDES; SRAM CELL; ULTRA-THIN;

EID: 77952346796     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2009.5424365     Document Type: Conference Paper
Times cited : (13)

References (10)


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.