Design challenges for 22nm CMOS and beyond

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2009, Pages

  Borkar, Shekhar ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS SCALING; DESIGN CHALLENGES; DESIGN TECHNOLOGIES; ECONOMIC CHALLENGES;

ELECTRON DEVICES;

CMOS INTEGRATED CIRCUITS;

EID: 77952326878     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2009.5424329     Document Type: Conference Paper

References (2)

1. S. Borkar, "Designing Reliable Systems from Unreliable Components: The Challenges of Transistor Variability and Degradation", IEEE Micro, November-December 2005.
2. S. Borkar, "Design Perspectives on 22nm CMOS and Beyond", DAC 2009