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Volumn 53, Issue , 2010, Pages 428-429
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A 53-to-68GHz 18dBm power amplifier with an 8-way combiner in standard 65nm CMOS
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Author keywords
[No Author keywords available]
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Indexed keywords
CASCODE TOPOLOGY;
CLASS-AB POWER AMPLIFIERS;
CMOS CIRCUITS;
CMOS PROCESSS;
DC VOLTAGE;
DRAIN-SOURCE VOLTAGE;
FREQUENCY BAND WIDTH;
FULL BAND;
HIGH DATA RATE;
HIGH LINEARITY;
IEEE 802.15.3C;
LARGE-SIGNALS;
MARKET DEMAND;
MAXIMUM AVAILABLE GAIN;
MM-WAVE FREQUENCIES;
OFDM MODULATION;
OUTPUT POWER;
POWER PERFORMANCE;
RELIABILITY CONSTRAINTS;
SATURATED OUTPUT POWER;
SPECIFIC DESIGN;
SUPPLY VOLTAGES;
TIME-DEPENDENT DIELECTRIC BREAKDOWN;
TRANSISTOR RELIABILITY;
WIRELESS APPLICATION;
DIELECTRIC MATERIALS;
MILLIMETER WAVES;
ORTHOGONAL FREQUENCY DIVISION MULTIPLEXING;
POWER AMPLIFIERS;
RELIABILITY;
STANDARDS;
CMOS INTEGRATED CIRCUITS;
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EID: 77952209787
PISSN: 01936530
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/ISSCC.2010.5433879 Document Type: Conference Paper |
Times cited : (106)
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References (7)
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