A novel multi-bit parallel ΔΣ FM-to-digital converter with 24-bit resolution

European Solid-State Circuits Conference

Volumn , Issue , 2002, Pages 687-690

  Wisland, Dag T ^a   Hovin, Mats E ^a   Lande, Tor S ^a  

^a UNIVERSITY OF OSLO   (Norway)

Author keywords

[No Author keywords available]

Indexed keywords

CLOCK FREQUENCY; CMOS PROCESSS; FIRST-ORDER; FREQUENCY DELTA-SIGMA MODULATORS; GLOBAL FEEDBACK; MEASURED RESULTS; MULTI-BITS; PARALLELIZATION TECHNIQUES;

CMOS INTEGRATED CIRCUITS; DIGITAL INTEGRATED CIRCUITS; ELECTRIC NETWORK TOPOLOGY; FREQUENCY CONVERTERS; QUANTIZATION (SIGNAL);

MODULATORS;

EID: 77952166931     PISSN: 19308833     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

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2. R. Schreier and B. Zhang, "Noise-Shaped Multi-Bit D/A converter Employing Unit Elements", Electronic Letters, vol. 31, no. 20, pp. 1712-1713, September, 1995.
3. E. Fogelman and I. Galton, "A Dynamic Element Matching Technique for Reduced-Distortion Multi-Bit Quantization Delta-Sigma ADCs", IEEE Transactions on Circuits and Systems II, vol. 48, no. 2, pp. 158-170, February, 2001.
4. S.R. Norsworthy, R. Schreier and G.C. Themes, Delta-Sigma Data Converters, IEEE press, New Jersey, 1997.
5. M. Høvin, A. Olsen, T.S. Lande and C. Toumazou, "Delta-Sigma Modulators Using Frequency-Modulated Intermediate Values", IEEE Journal of Solid-State Circuits, vol. 32, no. 1, pp. 13-22, January, 1997.
6. M. Høvin, D.T. Wisland, J.T. Marienborg, T.S. Lande and Y. Berg, "Pattern Noise in the Frequency-Modulator", Analog Intergrated Circuits and Signal Processing, Kluwer Academic Publishers, vol. 26, no. 1, pp. 75-82, January, 2001.